pub fn tiled_field_inversion(
field: &[f64],
mask: &[u8],
grid: &Grid,
model: &OnnxModel,
divisor: usize,
cfg: &TileConfig,
pre: impl Fn(f64) -> f32 + Sync,
post: impl Fn(f32) -> f64 + Sync,
progress: impl FnMut(usize, usize),
) -> Result<Vec<f64>, OnnxError>Expand description
Run a fully-convolutional field→χ ONNX net patch-by-patch with a context halo, bounding peak memory to a single patch.
Values are fed/read as f32 in the x-outer NCDHW layout the nets use; pre maps each
input field value, post maps each raw net output value. Each patch is zero-padded to a
multiple of divisor (the net’s size_divisor) and to include the halo. The result is
masked, matching the whole-volume wrappers.